The present invention relates to a semiconductor device, and more particularly, to a method for controlling uniformity of patterns formed in a semiconductor device.
Generally, photolithography is a technology for creating high integration semiconductor devices by forming patterns in a predetermined shape on a wafer substrate using light. Namely, light (e.g., an ultraviolet ray, an electron beam, or an X ray) is irradiated onto a photoresist layer where a predetermined portion of the photoresist layer is exposed to the light using a photo-mask. Then a part of the photoresist layer having large solubility with respect to a developing solution is removed to form a photoresist pattern in a predetermined shape. The part of the layer (underneath the photo resist pattern) exposed by the photo resist pattern is removed by an etch process to form a desired semiconductor device pattern.
However, as the semiconductor device becomes highly integrated and a design rule has been rapidly reduced, various problems occur due to a resolution limit of the photolithography process. For example, the critical dimension (CD) uniformity on a wafer becomes deteriorated. That is, when patterns designed with the same CD are transferred on a wafer using the same photo mask, CDs of transferred patterns can be significantly changed according to the transfer location of the patterns.
When the CDs of the transferred patterns are not uniform, a line pattern may be slanted as shown in FIG. 1 and reduce a process margin. When the CDs of the transferred patterns are not uniform, a bridge may be generated between hole patterns as shown in FIG. 2 and thereby reduce the process margin.
In the related art, an assist feature (AF) is used to solve such a pattern uniformity problem.
However, as the semiconductor devices have become ultra dense, it is not easy to use the AF because of the following restrictions.
The AF needs interval optimization with a main pattern. If the AF is located too far apart from a target pattern, a required interference effect may be reduced. Conversely, if the AF is located too close to the main pattern to maximize the interference effect, scum can occur from the AF itself.
Further, the AF requires optimization of a pattern size since the scum can be prevented and the interference effect can be maximized only if the pattern size of the AF is optimized.
Moreover, although the AF has the optimized pattern size suitable for an optional photolithography process, the AF should have a pattern size where a photo-mask maker can check a pattern. Up to now, it is known that a pattern size ranging from 40 nm to 50 nm can be checked by the photo-mask maker. The photo-mask maker, however has difficulties in checking the patterns if the pattern size is less than 40 nm. Recently, as the photolithography process moves from a KrF process (λ=248 nm) to an ArF process (λ=193 nm), an AF used for the KrF process is applied to the ArF process. However, most of the AF causes scum on a wafer. According to data analysis results obtained from many experiments and simulations, an available pattern size of the AF applicable to the ArF process is less than or equal to 35 nm. However, the photo-mask maker has difficulty checking this pattern size so may not be able to check an optimal AF pattern size that is suitable for the ArF process.
Therefore, there is required a method capable of efficiently enhancing the CD uniformity without significantly modifying existing exposure systems.